This invention relates to a semiconductor device and, more particularly, to a power-on circuit in which resetting of a circuit designed to allow direct current to flow upon resetting is performed in a stable state without allowing a large current to flow in this circuit.
Among the conventional techniques for resetting a circuit designed to allow the direct current to flow at the time of resetting in stable state, without permitting a large current to flow therein, there is such a technique disclosed in, for example, the JP Patent Kokai JP-A-6-290586. The conventional technique, disclosed in this prior art, is directed to a semiconductor memory device adapted to be used without a dummy cycle on power source on, and includes a power on reset circuit responsive to power source on to send a reset signal to an internal circuit, a ring oscillator outputting pulses of a pre-set period during an initial pause period responsive to power source on and, logic sum means for taking a logical sum of the pulse of the pre-set period and an external/RAS signal to send the resulting sum signal to an internal circuit. There is also disclosed a conventional power-on circuit shown in FIG. 7. This power-on circuit includes a PON generating circuit 1 for generating and outputting a power-on signal PON representing a voltage increasing state as from power source on and a PONS generating circuit 2 for generating one-shot signals PONS from the power source on signal PON generated and output by the PON generating circuit 1. This conventional power-on circuit effects circuit resetting solely by one-shot signals PONS.
However, the following problem has been encountered in the course of investigations toward the present invention. Namely, the conventional technique resets the entire circuit adapted to reset at indefinite nodal points (including, for example, a circuit reset on power source on, such as a fuse) by the one-shot signals. Thus, a large current flows in the circuit such that stable resetting cannot be realized caused by, for example, power source voltage drop.
It is therefore an object of the present invention to provide a power-on circuit and a resetting method whereby resetting can be achieved reliably without allowing a large current to flow in a circuit flown through by the direct current at the time of resetting.
Other objects of the present invention will become apparent in the entire disclosure.
According to a first aspect of the present application, there is provided a power-on circuit in which resetting of a circuit designed to allow direct current to flow at the time of resetting is performed in stable state without allowing a large current to flow in this circuit. The power-on circuit comprises a PON generating circuit generating and outputting a power-on signal representing an increasing voltage state following power source on, and delay pulse generating unit generating and outputting a plurality of one-shot pulses having time delay setting such that time delay becomes sequentially larger with reference to a waveform of the power-on signal. Resetting is performed for the circuit designed to allow the direct current to flow at the time of resetting using the one-shot pulses sequentially in an order of the increasing delay time.
According to a second aspect of the present application, there is provided in a power-on circuit wherein a plurality of one-shot pulses are generated at the time of power on so as to be used for circuit resetting, and wherein the circuit is reset by two or more partial resetting operations using the plural one-shot pulses.
According to a third aspect of the present application, there is provided a power-on circuit in which resetting of a circuit designed to allow a direct current at the time of resetting is performed in stable state without allowing a large current to flow in this circuit; the power-on circuit comprising a PON generating circuit generating and outputting a power-on signal representing an increasing voltage state following power source on, a PONS generating circuit generating first one-shot pulses based on a waveform of the power-on signal and a PONT generating circuit generating second one-shot pulses having a timing delayed by a pre-set time from the first one-shot pulses. The circuit designed to allow the direct current to flow at the time of resetting is once reset using the first one-shot pulses and the circuit thus reset once is subsequently reset using the second one-shot pulses.
According to a fourth aspect of the present application, there is provided in a power-on circuit in which resetting of a circuit designed to allow the direct current to flow at the time of resetting is performed in stable state without allowing a large current to flow in this circuit; the power-on circuit comprising a PON generating circuit generating and outputting a power-on signal representing an increasing voltage state following power source on, a ring oscillator arranged downstream of the PON generating circuit, a counter arranged downstream of the ring oscillator and a selector arranged downstream of the ring oscillator in parallel with the counter. For generating a plurality of one-shot pulses at the time of power on for use for circuit resetting, the ring oscillator generating the plural one-shot pulses, the counter and the selector are used, and the number of the pulses generated by the ring oscillator is counted and the selector distributes the one-shot pulses into n.
According to a fifth aspect of the present application, the ring oscillator is oscillated at the time of voltage increase following power source on to generate and output pulses.
According to a sixth aspect of the present application, there is provided the selector distributes the one-shot pulses into n, and wherein the distributed one-shot pulses are imparted to a plurality of the circuits to permit the circuits to be reset sequentially with offset timings.
According to a seventh aspect of the present application, there is provided a resetting method in which resetting of a circuit designed to allow the direct current to flow at the time of resetting is performed in stable state without allowing a large current to flow in this circuit; the power-on circuit comprising generating and outputting a power-on signal representing an increasing voltage state following power source on, generating and outputting a plurality of one-shot pulses having time delay setting such that time delay becomes sequentially larger with reference to a waveform of the power-on signal and resetting the circuit designed to allow the direct current to flow at the time of resetting using the one-shot pulses sequentially in an order of the increasing delay time.
According to a eighth aspect of the present application, there is provided a resetting method in which a plurality of one-shot pulses are generated at the time of power on for use for resetting a circuit designed to allow the direct current to flow upon resetting, wherein the circuit is reset by two or more partial resetting operations using the plural one-shot pulses.
According to a ninth aspect of the present application, there is provided a resetting method in which resetting of a circuit designed to allow the direct current at the time of resetting is performed in stable state without allowing the large current to flow in the circuit; the method comprising: generating and outputting a power-on signal representing an increasing voltage state following power source on, generating first one-shot pulses based on a waveform of the power-on signal and generating second one-shot pulses having a timing delayed by a pre-set time from the first one-shot pulses. The circuit designed to allow the direct current at the time of resetting is once reset using the first one-shot pulses and the circuit thus reset once is then reset using the second one-shot pulses.
According to a tenth aspect of the present application, there is provided a resetting method in which resetting of a circuit designed to allow the direct current at the time of resetting is performed in stable state without allowing a large current to flow in the circuit; the method comprising: generating and outputting a power-on signal representing an increasing voltage state following power source on, and generating and outputting ring oscillator pulses responsive to the power-on signal. In generating a plurality of one-shot pulses at the time of power on for use for resetting the circuit, the number of the ring oscillator pulses is counted and the one-shot pulses are distributed into n.
According to a eleventh aspect of the present application, the ring oscillator pulses are generated and output at the time of voltage increase following power source on.
According to a twelfth aspect of the present application, the one-shot pulses distributed into n are imparted to a plurality of the circuits to permit the circuits to be reset sequentially with offset timings.